Check for shorted FETs (Drain to Source) in the sustain switching circuit.
The Y-Sus board is highly susceptible to component fatigue, particularly within the switching circuits. The schematic analysis points to specific FETs and recovery circuits as primary failure points. Efficient repair requires checking these components for shorts and verifying that the ERC is functioning correctly to prevent high-voltage failure. 7. Recommendations
A typical Y-Sus schematic is divided into several logical sections: Receives high-voltage Vscancap V sub s c a n end-sub Vscap V sub s (sustain) power from the power supply unit (PSU). Ysus Schematic Diagram
Sends the final waveform to the Y-Buffer boards.
If the Y-Sus shuts down immediately, remove the Y-Buffer boards to check for shorts on the buffer board itself. 6. Conclusion Check for shorted FETs (Drain to Source) in
This report provides a technical analysis of the Y-Sustain (Y-Sus) board schematic diagram, a critical component in Plasma Display Panels (PDP). The Y-Sus board generates the high-voltage waveforms required to sustain plasma discharge. This document breaks down the major functional blocks—power management, energy recovery, and sustain switching—to facilitate diagnostics, component identification, and repair processes. 2. Terms of Reference
The schematic often reveals that failure clusters around the switching MOSFETs (e.g., ) due to overheating. Sends the final waveform to the Y-Buffer boards
Monitors voltage levels and shuts down if a short is detected. 4. Findings and Analysis